DridriLaBastos
New member
Hello everyone, I am totally new to this forum. I just searched for an emulation forum to ask my question and I find this one.
I am writing an IBM PC 5150 emulator (I plan to do an IBM PC AT next). I have a problem to know how the FDC internal timers work. From the IBM PC documentation : the HLT timer should have a value of 1 to wait for the 8ms track-to-track interval.
But from the documentation of the intel 8272A, a value of 1 in the HLT timer means a wait value of 2 ms
It is also said that the timing value from the timers is a function of the clk pin.
What I understand is that, if the value of the HLT timer is 1, the FDC will wait 1680 clock cycles because at 8MHz a clk cycle is 119ns and 119*1680 ~ 2ms (and it is twice long with 4MHz clk as mentionned in the doc)
But does this mean that the value of the register is multiplied by the clock speed in MHz? And in this case, the clock of the FDC will be 4MHz to give the 4*2ms = 8ms to match what is said in the IBM doc. But it sounds crazy to me if it is that. What I understand from the intel doc is the first explanation and I usually have no big troubles understanding what intel said about their products.
So how does those timers work ?
I am writing an IBM PC 5150 emulator (I plan to do an IBM PC AT next). I have a problem to know how the FDC internal timers work. From the IBM PC documentation : the HLT timer should have a value of 1 to wait for the 8ms track-to-track interval.
But from the documentation of the intel 8272A, a value of 1 in the HLT timer means a wait value of 2 ms
It is also said that the timing value from the timers is a function of the clk pin.
What I understand is that, if the value of the HLT timer is 1, the FDC will wait 1680 clock cycles because at 8MHz a clk cycle is 119ns and 119*1680 ~ 2ms (and it is twice long with 4MHz clk as mentionned in the doc)
But does this mean that the value of the register is multiplied by the clock speed in MHz? And in this case, the clock of the FDC will be 4MHz to give the 4*2ms = 8ms to match what is said in the IBM doc. But it sounds crazy to me if it is that. What I understand from the intel doc is the first explanation and I usually have no big troubles understanding what intel said about their products.
So how does those timers work ?
